Read or download the official PDF of this gazette notification issued by the Ministry of Electronics and Information Technology on 14th August 2026. Classified under Press Release.
Executive Summary
The Chips to Start-ups (C2S) Programme is a government initiative designed to transform India into a global semiconductor hub by addressing the workforce talent gap and infrastructure needs. The program aims to train 85,000 industry-ready professionals and has already reached over 68,000 students while facilitating 254 successful chip tape-outs. As of August 2026, the project continues to expand through financial support for research and the provision of advanced design tools to 332 academic institutions.
Key Points / Main Content
Program Objectives and Talent Development
Capacity Building: The C2S Programme aims to generate 85,000 industry-ready personnel at B.Tech, M.Tech, and PhD levels specializing in semiconductor chip design.
Current Progress: More than 68,000 students have been trained under the initiative so far.
Infrastructure and Design Success
Tool Access: 332 academic institutions nationwide have been provided access to advanced Electronic Design Automation (EDA) tools from major providers including Synopsys, Cadence, Siemens EDA, and others.
Design Milestones: Participating institutions have successfully taped out 254 chip designs, with 175 designs at the 180 nm technology node at SCL, Mohali, and 79 at overseas foundries.
Regional Implementation: Andhra Pradesh
Institutional Support: 23 academic institutions in Andhra Pradesh have utilized EDA tools for over 4.34 lakh cumulative tool-hours.
Funded Research Projects: Four specific institutions in the state are receiving financial support for high-tech developments, including:
Secure RISC-V processors (IIT Tirupati).
Hardware accelerators for high-performance computing (IIITDM Kurnool).
Energy-efficient neuromorphic processors for IoT (NIT Andhra Pradesh).
Memory-efficient co-processing units for Edge AI (Shri Vishnu Engineering College for Women).
Impact Analysis
Academic InstitutionsImpact
Institutions receive advanced EDA software infrastructure and financial backing for specialized semiconductor research, enabling them to participate in high-level chip design and tape-out processes.
Action Required
Institutions must maintain the utilization of EDA tools and progress current research projects through various stages of design, development, and prototype validation.
Students and ResearchersImpact
They gain access to industry-standard tools and specialized training, improving their employability and technical expertise in the semiconductor design ecosystem.
Action Required
Students need to participate in the training programs provided to meet the target of becoming part of the 85,000-strong industry-ready workforce.
Government and Industry EcosystemImpact
The government strengthens the national semiconductor design base, while the industry benefits from a growing pool of specialized talent and domestic technological innovations.
Action Required
Continued monitoring of project milestones and financial support is necessary to ensure research projects reach the tape-out stage at domestic and overseas foundries.
Key Entities Referenced
Chips to Start-ups (C2S) Programme: A national initiative aimed at capacity-building in semiconductor design, training 85,000 industry-ready personnel and providing infrastructure to academic institutions.
Ministry of Electronics & IT: The primary ministry overseeing policy interventions and investments to strengthen India's semiconductor design ecosystem.
Andhra Pradesh: The central state of focus in the document where 23 academic institutions received access to advanced design tools and financial support for research projects.
Semi-Conductor Laboratory (SCL), Mohali: A key research and development facility where participating institutions successfully taped out 175 chip designs at the 180 nm technology node.
Shri Jitin Prasada: The Union Minister of State for Electronics and IT who provided official updates on the programme's progress and specific research project milestones.
Ministry of Electronics & IT
Chips to Start-ups Programme Strengthens
India’s Semiconductor Design Ecosystem and
Industry Ready Talent
Over 68,000 Students Trained and 254 Chip Designs
Successfully Taped Out Under C2S Programme
प्रव तथ: 14 AUG 2026 1:24PM by PIB DelhiGuided by the vision of the Hon'ble Prime Minister Shri Narendra Modi to make India a global hub for
semiconductor chip design, the Government has undertaken focused policy interventions and sustained
investments in semiconductor education, research, and design infrastructure, thereby strengthening the
country's semiconductor design ecosystem and talent base.
Chips to Start-ups (C2S) Programme has been initiated for capacity-building across the country and to
address the issue of workforce talent gap and chip design infrastructure in the semiconductor design area.
C2S Programme aims to generate 85,000 numbers of industry-ready manpower at B.Tech, M.Tech, and
PhD levels specialized in semiconductor chip design area.
Under the C2S Programme:
i. More than 68,000 students have been trained under the programme so far.
ii. Access to advanced Electronic Design Automation (EDA) tools from Synopsys,
Cadence, Siemens EDA, Ansys, Keysight, Silvaco, Renesas-Altium, AMD-Xilinx,
AsterQuanta, Compcarta, Cadre and AMD-Xilinx has been provided to 332 academic
institutions across the country.
iii. Participating institutions have successfully taped out 254 chip designs, comprising 175
designs at the 180 nm technology node at SCL, Mohali, and 79 designs at overseas
semiconductor foundries.
In the State of Andhra Pradesh:
(i) 23 academic institutions have been provided access to advanced EDA tools under the C2S Programme,with cumulative utilization exceeding 4.34 lakh tool-hours as per list given below:
Sr No Name of Institution
1 Indian Institute of Technology Tirupati
2 Indian Institute of Information Technology Design and Manufacturing Kurnool
3 National Institute of Technology Andhra Pradesh
4 Shri Vishnu Engineering College for Women, Bhimavaram
5 Vignan's Foundation for Science Technology and Research, Guntur
6 Vellore Institute of Technology (VIT-AP) University, Amaravati, AP
7 SRM University, AP
8 Jawaharlal Nehru Technological University (JNTU), Kakinada
9 Jawaharlal Nehru Technological University (JNTU), Anantapur
10 V.R. Siddhartha Engineering College, Vijayawada
11 Anil Neerukonda Institute of Technology & Sciences (ANITS), Visakhapatnam
12 Vishnu Institute of Technology, AP
13 Sagi Rama Krishnam Raju (SRKR) Engineering College, Andhra Pradesh
14 GMR Institute of Technology (GMRIT), Andhra Pradesh
15 G. Pullaiah College of Engineering and Technology, Kurnool16 Koneru Lakshmaiah Education Foundation, Guntur
17 Vignan's Institute of Information Technology, Visakhapatnam
18 Mohan Babu University, Tirupati, Andhra Pradesh
19 Narayana Engineering College, Gudur, Andhra Pradesh
20 Sri Vasavi Engineering College, Tadepalligudem, Andhra Pradesh
21 Gayatri Vidya Parishad College of Engineering, Visakhapatnam
22 Santhiram Engineering College, Nandyal, Kurnool
23 National Institute of Electronics and Information Technology Tirupati
(ii) The following research projects have been financially supported to promote semiconductor chip design
research and strengthen capacity building across four academic institutions:
a) Development of a secure RISC-V processor for cryptographic applications – Indian
Institute of Technology (IIT) Tirupati.
b) Development of a hardware accelerator to improve computing performance for high-
performance computing and cyber-physical systems – Indian Institute of Information
Technology Design and Manufacturing (IIITDM) Kurnool.
c) Development of an energy-efficient neuromorphic processor for edge Internet of Things
(IoT) applications – National Institute of Technology (NIT) Andhra Pradesh.
d) Development of a memory-efficient co-processing unit for edge Artificial Intelligence (AI)
applications – Shri Vishnu Engineering College for Women, Bhimavaram.
The projects are currently at various stages of design and development. Depending on their scope and
maturity, they are expected to progress towards prototype validation, including tape-out at semiconductor
foundries, wherever applicable.
This information was given by Union Minister of State for Electronics and IT Shri Jitin Prasada in
Lok Sabha on 12.08.2026
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Vinod Kumar / Kanishk Sharma
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