Home India Ministry of Electronics and Information Technology 23 Chip-Design Projects Sanctioned for Financial Support und...
Date: 2025-07-30 Category: Not Applicable State: Union Government Country: India

23 Chip-Design Projects Sanctioned for Financial Support under Design Linked Incentive(DLI) Scheme to support domestic companies, startups, and MSMEs in semiconductor design

Issued by Ministry of Electronics and Information Technology · Not Applicable

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Executive Summary & Key Takeaways

The Ministry of Electronics and Information Technology (MeitY) is implementing the Design Linked Incentive (DLI) Scheme as part of the Semicon India Programme, which has a total outlay of ₹76,000 crore to develop a semiconductor and display manufacturing ecosystem in India. The DLI scheme, with an outlay of ₹1,000 crore, aims to support domestic companies, startups, and MSMEs in semiconductor design by addressing high entry barriers and long development timelines. The DLI Scheme provides design infrastructure support, including access to Electronic Design Automation (EDA) tools and Intellectual Property (IP) cores, and financial incentives. These incentives include up to 50% of eligible costs, capped at ₹15 crore per application, for design prototyping, scaling up, and volume production, as well as incentives of 6-4% of net sales turnover over five years, capped at ₹30 crore per application, for deployment and commercialization of chip solutions. Since its launch in December 2021, the DLI Scheme has approved 278 academic institutions and 72 startups for access to EDA tools. Twenty-three firms/startups have been sanctioned financial support for designing chips for various applications, including surveillance cameras, energy meters, microprocessor IPs, and networking applications. Ten of these companies have raised venture capital (VC) funding to scale up their design prototypes for commercialization, and six have completed prototype tapeouts at semiconductor foundries. Recently, 20 chip designs from 17 academic institutions have been successfully fabricated by SCL, Mohali. A total project outlay of ₹803.08 crore, including the cost of EDA tools, has been approved under the DLI Scheme. The release of funds is linked to the achievement of defined milestones, including chip deployment. The DLI Scheme is implemented in consultation with stakeholders, and modifications will be made based on evolving requirements and feedback. This information was submitted by Union Minister of Electronics and Information Technology Shri Jitin Prasada in Lok Sabha.

Key Entities Referenced

Ministry of Electronics and Information Technology: The Indian government ministry responsible for electronics and information technology policy. Design Linked Incentive (DLI) Scheme: A scheme to support domestic companies, startups, and MSMEs in semiconductor design. Semicon India Programme: A Government of India program with an outlay of ₹76,000 crore for semiconductor and display manufacturing ecosystem development. Electronic Design Automation (EDA): Tools used in the design and verification of integrated circuits. SCL, Mohali, Punjab: Semiconductor Laboratory located in Mohali, Punjab, involved in the fabrication of chip designs. Lok Sabha: The lower house of the Parliament of India, where information about the DLI Scheme was submitted. Shri Jitin Prasada: Union Minister of Electronics and Information Technology. MSMEs: Micro, Small & Medium Enterprises
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Ministry of Electronics & IT 23 Chip-Design Projects Sanctioned for Financial Support under Design Linked Incentive(DLI) Scheme to support domestic companies, startups, and MSMEs in semiconductor design 278 Academic Institutions and 72 Startups Access Advanced Electronics Design Automation(EDA) Tools under DLI 20 chip designs from 17 academic institutions are successfully fabricated by SCL, Mohali DLI Scheme Addresses High Entry Barriers and Long Timelines in Semiconductor Product Design and Commercialization Posted On: 30 JUL 2025 9:08PM by PIB Delhi The Government has approved the ‘Semicon India Programme’ with a total outlay of ₹76,000 crore for the development of a semiconductor and display manufacturing ecosystem in the country. As part of this, the ‘Design Linked Incentive (DLI) Scheme’ has been approved with an outlay of ₹1,000 crore to support domestic companies, startups, and MSMEs in semiconductor design. Designing and commercializing a semiconductor product involves high entry barriers, long development timelines, and global competition. To address these challenges, the DLI Scheme provides for the following: Design infrastructure support, such as Electronic Design Automation (EDA) tools and Intellectual (cid:108) Property (IP) cores, to help with early prototyping of designs Financial incentive of up to 50% of eligible costs, capped at ₹15 cr/application, for design (cid:108) prototyping, scaling-up, and volume production Incentives of 6% to 4% of net sales turnover over five years, capped at ₹30 cr/application, for (cid:108) deployment & commercialization of chip solutions Under DLI, since its launch in December 2021: 278 academic institutions (C2S) and 72 startups (DLI) have been approved for access to state-of- (cid:108) the-art Electronic Design Automation (EDA) tools 23 firms & startups are sanctioned financial support for designing chips for surveillance camera, (cid:108)energy meter, microprocessor IPs, networking applications etc. Out of these, ten (10) companies have raised venture capital (VC) funding for scaling up their (cid:108) design prototypes for commercialization Six (6) companies have completed prototype tape-outs at various semiconductor foundries (cid:108) Recently, 20 chip designs from 17 academic institutions have been successfully fabricated by SCL, Mohali. A total project outlay of ₹803.08 crore, including the cost of EDA tools, has been approved under the DLI Scheme. These projects are at various stages of semiconductor design and development. The release of funds under the scheme are linked with the achievement of defined milestones, including the deployment of chips. The DLI Scheme is implemented in close consultation with stakeholders and beneficiary companies. Any modifications needed will be done based on evolving requirements and feedback. This information was submitted by Union Minister of Electronics and Information Technology Shri Jitin Prasada in Lok Sabha today. *** Dharmendra Tewari /Navin Sreejith (Release ID: 2150464)

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