**Executive Summary**
This document addresses Unstarred Question No. 516 regarding financial and technical support for NIT Jalandhar's indigenous semiconductor chip, set to be answered on December 3, 2025. It outlines the government's support for the semiconductor ecosystem through the Chips to Start-up (C2S) Programme, which supports 300 institutions, including NIT Jalandhar. The project duration is five years with an outlay of ₹4.80 crore.
**Key Points / Main Content**
* **Government Initiatives:**
* India is a major electronics manufacturing hub aiming to develop its semiconductor and electronics components industry.
* The government is strengthening the semiconductor ecosystem through the "Make in India, Make for the World" vision.
* **Chips to Start-up (C2S) Programme:**
* Comprehensive support provided to 300 participating institutions, including NIT Jalandhar.
* Aims to generate 85,000 industry-ready manpower at B.Tech, M.Tech, and PhD levels.
* **Technical Support:**
* Centralized access to Electronic Design Automation (EDA) tools, design tape-out at SCL Mohali, and regular training.
* Hands-on chip design experience for students and researchers.
* Access to Field Programmable Gate Array (FPGA) hardware boards for functional validation.
* Access to empanelled service providers for testing, fabrication, and packaging (details at [https://c2s.gov.in/Post\_Silicon.jsp](https://c2s.gov.in/Post_Silicon.jsp)).
* Institutions can engage other vendors outside the empanelled list based on project needs.
* **NIT Jalandhar's Project:**
* NIT Jalandhar is developing a System on Chip (SoC) for next-generation IoT systems.
* Collaborating with NIT Rourkela, NIT Jamshedpur, NIT Raipur, and IIEST Shibpur.
* The project has a five-year duration with a total outlay of ₹4.80 crore.
* ₹96 lakh is allocated to each collaborating institute.
* NIT Jalandhar designed a Voltage-Controlled Oscillator (VCO) chip for a Phase-Locked Loop (PLL).
* The chip was fabricated at SCL Mohali and showcased during SEMICON India 2025.
**Impact Analysis**
**Stakeholder:** NIT Jalandhar
* **Impact**: NIT Jalandhar receives technical and financial support to develop its indigenous semiconductor chip.
* **Action Required**: NIT Jalandhar needs to continue developing the System on Chip (SoC) in collaboration with partner institutions within the five-year project duration, adhering to the program guidelines.
**Stakeholder:** Students and Researchers at Participating Institutions
* **Impact**: Provided with opportunities for hands-on experience in chip design and access to necessary tools and resources.
* **Action Required**: Actively participate in the C2S Programme and utilize the available resources to develop expertise in semiconductor chip design.
**Stakeholder:** Government of India
* **Impact**: Advancement of the "Make in India, Make for the World" initiative and the development of a robust domestic semiconductor industry.
* **Action Required**: Continue providing support and monitoring the progress of the C2S Programme and its impact on the semiconductor ecosystem.
Key Entities Referenced
Chips to Startup (C2S) Programme: A program to facilitate comprehensive support to participating institutions in semiconductor chip design, testing, and fabrication, including financial and technical assistance.
NIT Jalandhar: An academic institution developing an indigenous semiconductor chip and participating in the Chips to Startup (C2S) Programme.
Ministry of Electronics and Information Technology: The ministry responsible for answering the question regarding support for NIT Jalandhar's semiconductor chip.
SCL Mohali: A facility where the Voltage-Controlled Oscillator (VCO) chip designed by NIT Jalandhar was fabricated; provides centralized access to EDA tools and design tape-out for the C2S program.
GOVERNMENT OF INDIA
MINISTRY OF ELECTRONICS AND INFORMATION TECHNOLOGY
LOK SABHA
UNSTARRED QUESTION NO. 516
TO BE ANSWERED ON: 03.12.2025
SUPPORT FOR NIT JALANDHAR’S INDIGENOUS SEMICONDUCTOR CHIP
516. SHRI CHARANJIT SINGH CHANNI:
Will the Minister of ELECTRONICS AND INFORMATION TECHNOLOGY be pleased to state:
(a) whether financial or technical support has been approved for commercialising the indigenous
semiconductor chip unveiled by NIT Jalandhar at SEMICON India 2025;
(b) if so, the details of funding and timelines for the same;
(c) the estimated employment generation in Jalandhar’s electronics ecosystem; and
(d) whether a local Centre of Excellence for testing and fabrication is proposed and if so, the details thereof?
ANSWER
MINISTER OF STATE FOR ELECTRONICS AND INFORMATION TECHNOLOGY
(SHRI JITIN PRASADA)
(a) to (d): India has emerged as a major electronics manufacturing hub, with a six-fold increase in production
over the past decade and currently employing 25 lakh people. To cater to the growing demand of electronics
manufacturing, it is imperative for us to develop the semiconductor and electronics components industry.
In alignment with the Prime Minister’s vision of Make in India, Make for the World, the Government is
strengthening the semiconductor ecosystem, supported by design talent and indigenous R&D capabilities.
Technical Support for Testing and Fabrication
The Chips to Start-up (C2S) Programme facilitates comprehensive support to 300 participating institutions,
including NIT Jalandhar, such as:
● Centralised access to Electronic Design Automation (EDA) tools, design tape-out at SCL Mohali,
and regular training.
● Complete hands-on experience on chip design to Students and researchers at the institutions.
● Access to Field Programmable Gate Array (FPGA) hardware boards for functional validation.
● Access to empanelled service providers for testing, fabrication and packaging (details at
https://c2s.gov.in/Post_Silicon.jsp )
● Institutions also have the flexibility to engage other leading vendors outside the empanelled list
based on project requirements.
The C2S Programme aims to generate 85,000 numbers of industry-ready manpower at B.Tech, M.Tech, and
PhD levels specialized in semiconductor chip design area.
As part of this Programme, institutions are developing working prototypes of semiconductor chips.
NIT Jalandhar is the participating institution under Chips to Startup (C2S) Programme for developing a
System on Chip (SoC) for next-generation IoT systems in collaboration with NIT Rourkela, NIT
Jamshedpur, NIT Raipur and IIEST Shibpur.Project has a five-year duration with a total outlay of ₹4.80 crore, with ₹96 lakh allocated to each
collaborating institute.
As part of the initiative, NIT Jalandhar has designed a Voltage-Controlled Oscillator (VCO) chip for a
Phase-Locked Loop (PLL), fabricated at SCL Mohali and showcased during SEMICON India 2025.
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