**Semicon India 2025 Policy Summary**
Semicon India 2025, held in New Delhi, showcased the progress of Indian startups in semiconductor design and manufacturing, supported by the Design Linked Incentive (DLI) Scheme. Prime Minister Shri Narendra Modi emphasized the pivotal role of startups and the importance of Indian Intellectual Property (IP) creation in achieving self-reliance in semiconductor technology.
The DLI Scheme has sanctioned 23 chip design projects, providing 72 companies with access to industry-grade Electronic Design Automation (EDA) tools. Several startups presented their roadmaps, demonstrating advancements in chip design across sectors like surveillance, energy metering, networking, and motor control.
Key highlights include:
* **RISC-V Based SoC Generator Platform:** InCore Semiconductors launched a System-on-Chip (SoC) Generator Platform that significantly reduces chip design time, enabling faster innovation cycles. A test chip was taped out on TSMCs 40nm process node. InCore offers a diverse RISCV processor portfolio tailored to different application needs.
* **Networking and Broadband Solutions:** Aheesa Digital Innovations will release its indigenously designed Vihaan SoC and reference platforms to OEMs and ODMs in Q1 2026. The SoC is built around the 64-bit CDAC RISC-V based VEGA processor.
* **Surveillance and CCTV Cameras:** 3rdiTech, Netrasemi, BigEndian Semiconductors, and Mindgrove Technologies are developing indigenous SoC solutions for surveillance applications. These companies have collectively raised over ₹300 crore in VC funding (including DLI Scheme support) at a combined valuation exceeding ₹1,000 crore, with product launches planned for 2026.
* **Smart Energy Meters:** MosChip Technologies is developing Vidyut, a fully indigenous Smart Energy Meter chip, with validation of key IPs completed on a 180nm test chip packaged by SCL Mohali. The company aims for complete indigenous fabrication by 2026.
* **Motor Control:** Vervesemi is targeting volume production of indigenous chips and SoCs by late 2026 to early 2027 for applications in BLDC motor control, EVs, drones, smart energy metering, and weighing systems. They are also developing ASICs for space-grade data acquisition with ISRO, with engineering samples expected between late 2025 and 2026.
* **4G-LTE Modem Chipset:** MBit Wireless has developed a 4G-LTE modem chipset with a complete protocol stack, certified by the Global Certification Forum (GCF) and LG labs, and is undergoing field testing with Indian telecom companies.
These advancements underscore India's progress towards becoming a full-stack semiconductor nation, driven by domestic fabless chip design companies and the DLI Scheme.
*Release ID: 2163622*
Key Entities Referenced
Semicon India 2025: An exhibition showcasing advancements in the semiconductor industry in India.
Design Linked Incentive DLI Scheme: A Government of India initiative to promote domestic chip design and Intellectual Property (IP) creation.
SystemonChip SoC: An integrated circuit that integrates all components of a system on a single chip.
RISCV: Reduced Instruction Set Computer, an open standard instruction set architecture (ISA).
InCore Semiconductors: An Indian company that launched an innovative SystemonChip (SoC) Generator Platform.
TSMCs 40nm process node: A technology used in the manufacturing of the test chip. TSMC is Taiwan Semiconductor Manufacturing Company.
New Delhi, Delhi: The location where Semicon India 2025 was held at Yashobhoomi.
SCL Mohali: A company involved in the packaging of the Smart Energy Meter chip developed by MosChip Technologies; located in Mohali, Punjab.
Ministry of Electronics & IT
Semicon India 2025 Showcases Indian Startups
Accelerating the Roadmap for Aatmanirbhar Chips
under the Design Linked Incentive (DLI) Scheme
Roadmap for Indigenous System-on-Chip (SoC)
solutions Unveiled for Broadband, Surveillance,
Smart Energy Meters, Motor Control & Space
Applications Advancing India’s Vision of a Full-Stack
Semiconductor Nation
Breakthrough Reduced Instruction Set Computer
RISC-V Technology Based System-on-Chip (SoC)
Generator Platform Marks a Leap in Chip Design
Automation keeping our semiconductor journey with
the latest tools in the world
Posted On: 04 SEP 2025 12:44PM by PIB Delhi
On Day 2 of Semicon India 2025, held at Yashobhoomi in New Delhi, Prime Minister Shri Narendra
Modi visited the exhibition stalls. He was accompanied by Minister of Electronics and Information
Technology, Shri Ashwini Vaishnaw and Minister of State for Electronics and Information
Technology, Shri Jitin Prasada. During his visit, the Prime Minister underscored the pivotal role of
startups in propelling India’s semiconductor ambitions and importance of Indian Intellectual
Property(IP) creation.
DLI-backed Startups Showcase Chip Design Self-Reliance at Semicon India 2025
Backed by the Government of India’s Design Linked Incentive (DLI) Scheme, domestic chip design
and IPR is accelerating across critical sectors, from surveillance and energy metering to networking
and motor control. To date, 23 chip design projects have been sanctioned under the DLI Scheme,
with 72 companies gaining access to industry-grade Electronic Design Automation (EDA) tools.
Many of these startups showcased their roadmaps at Semicon India 2025, reflecting India's growing
capability and self-reliance in semiconductor chip design.
New System-on-Chip Platforms Demonstrate India’s Advancements in Chip Design Automation
Breakthrough RISC-V Based SoC Generator Platform
InCore Semiconductors, founded by the creators of the SHAKTI Processors - the first open-sourceRISC-V processor in India - has launched an innovative System-on-Chip (SoC) Generator Platform
that reduces frontend chip design time from months to just a few minutes. This automation
accelerates development timelines, lowers costs, and minimizes design risks, enabling faster
innovation cycles of their customers.
A test chip taped out on TSMC’s 40nm process node showcases six heterogeneous RISC-V cores from
InCore’s IP portfolio, a custom Network-on-Chip (NoC) with automatic protocol bridging, multiple
automatically integrated peripherals, and a fully deployed software stack including an Real Time
Operating System (RTOS), underscoring the platform’s robustness. InCore offers a diverse RISC-V
processor portfolio with three specialized families tailored to different application needs, featuring
extensive customization options:
Azurite delivers ultra-low power consumption with rapid interrupt response and deterministic
(cid:108)
timing, making it ideal for motor control, battery-operated devices, and precise real-time control.
Calcite balances power and performance for mid-tier embedded applications such as POS terminal,
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IP camera, and smart IoT devices, optimizing energy efficiency for mainstream use cases.
Dolomite, currently under development, is designed to provide high-performance vector processing
(cid:108)
and hardware virtualization to support complex, multi-workload environments typical in
networking and edge AI.
Networking and Broadband solutions
Aheesa Digital Innovations will make available its SoC along with reference platforms to Original
Equipment Manufacturer(OEMs) and Original Design Manufacturers (ODM)s in first quarter of 2026,
enabling them to develop custom networking and broadband solutions using a 100% indigenously
designed, Made-in-India SoC. The Vihaan SoC is built around the 64-bit C-DAC RISC-V based
VEGA processor and includes Secure Boot and advanced security enhancements. It also features
essential network interfaces and standard connectivity options such as PCIe 3.0, USB 3.0, and others
required for broadband and network communications.
Surveillance and CCTV cameras
Four Indian companies, 3rdiTech, Netrasemi, BigEndian Semiconductors, and Mindgrove
Technologies, are designing indigenous SoC solutions for critical applications such as surveillance
and CCTV cameras. Having successfully taped out test chips in 2025, these companies underscore
India’s growing expertise and self-reliance in semiconductor technology. Collectively, they have
raised over ₹300 crore in VC funding (including funding support from DLI Scheme) at a combined
valuation exceeding ₹1,000 crore, aimed at scaling up operations and developing production-grade
variants of their CCTV solutions, scheduled for launch in 2026.
Smart Energy Meters
MosChip Technologies developing Vidyut, a fully indigenous Smart Energy Meter chip and has
successfully validated key IPs, including the Power Management Unit, Temperature Sensor, Clock
Management Unit, and LCD Panel Controller, on a 180nm test chip, with packaging done by SCL
Mohali. MosChip plans to make Vidyut completely indigenous, including its fabrication, supporting
India’s push for self-reliance in semiconductor chip design by 2026.
Motor Control
Vervesemi is targeting volume production of its indigenous chips and SoCs by late 2026 to early
2027, with a strong pipeline of application-specific ICs for Brushless Direct Current (BLDC) motor
control, precision motor-control for EVs and drones, smart energy metering, and next-gen weighing
systems. Additionally, advanced Application-Specific Integrated Circuits (ASICs) for space-grade data
acquisition are in the works with ISRO replacing several imported components, with engineering
samples expected between late 2025 and 2026, positioning them as a key player in reducing import
dependence and enabling self-reliant electronics in critical sectors.
4G-LTE modem chipset
MBit Wireless has indigenously developed a 4G-LTE modem chipset with a complete protocol stacksoftware, successfully certified by the Global Certification Forum (GCF) and LG labs. The chipset is
being field tested with major Indian telecom companies for exploring adoption.
Under the leadership of Prime Minister Shri Narendra Modi, India is now moving beyond the
backend to become a full-stack semiconductor nation. These domestic fabless chip design companies
and others supported under the DLI Scheme together are advancing the vision of India’s ambition of
designing chips in India for the world.
About RISC V
RISC-V is a free, open standard, and modular instruction set architecture (ISA) based on the principles
of Reduced Instruction Set Computer (RISC). Developed at UC Berkeley, it provides unprecedented
design freedom by being open and royalty-free, allowing anyone to design and use custom processors
for a vast range of applications, from embedded systems to supercomputers, and fostering innovation
in areas like AI, IoT, and data centers.
About SoC Generator Platform
A System-on-Chip (SoC) Generator Platform is a specialized, automated tool or environment that
streamlines the design, integration, and verification of a System-on-Chip. SoC is an integrated circuit
that compresses all of a system's required components onto one piece of silicon.These platforms
automate complex and time-consuming aspects of chip design, such as integrating various intellectual
property (IP) cores (like CPUs, GPUs, memory, and peripherals) and ensuring functional correctness.
By doing so, they significantly reduce the design cycle, from concept to silicon-ready, making SoC
development more efficient, accessible, and potentially error-free.
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Dharmendra Tewari\Navin SReejith
(Release ID: 2163622)